Help understanding oscillator circuit

[G0HZU_JMR]

I spent some more time this morning with the linear simulator and I went back to the 1 port negative resistance analysis method and I used a basic VCCS model for the JFET and I based this on the datasheet.

This analysis does show that despite the common inductor tap being connected to a low impedance emitter follower and despite the 2n2 cap at the tap point the circuit can still produce negative resistance even with the drain to gate feedback capacitance removed. So in this analysis the only feedback path is via this node with the 2n2 cap. This is effectively a Colpitts analysis. The fact it could still develop negative resistance with the low impedance at the tap point was a surprise.

It looks like this circuit has three feedback paths if you also include the possibility of coupling between the coils.

There is feedback via the drain to gate capacitance, feedback via the classic Colpitts network and also feedback via the coil coupling.

This circuit does seem to be more complex than it first appears because of the various feedback mechanisms and it must have been quite a design challenge to get a circuit like this to oscillate across 2 decades of bandwidth (150kHz to 12MHz) by only changing the inductors. Therefore, I suspect that this circuit will probably have been developed quite carefully to take these feedback mechanisms into account. It may be that you have to use very similar inductors to the original design and also a JFET with similar Idss, Vp, Cdg and gm as the original.

What type of inductors are you using? It might be worth checking out the Q of each inductor across each band.

[ms660]

The circuit is almost a clone of the Leader LSG-16, in the LSG-16 the coils are mutually coupled, in the generator in question they appear not to be to any great extent according to the original projects layout, maybe that's part of the problem with this design.

Lawrence.

[G0HZU_JMR]

Yes, I think this circuit is more complex than it first appears because of the various feedback paths. This makes it harder to understand and faultfind if it doesn't oscillate across parts of some of the ranges.

The little nanovna would be a great tool to use to analyse the real hardware. I think it would be able to be used as a 1 port device to look at negative resistance margins (or the lack of) as each range is tuned.

It's also possible to do this on a simulator with a perfect 'virtual VNA' but this will be much harder to model accurately if the coils have mutual coupling. So the simulation would offer only limited insight compared to tests on the real circuit. It would be possible to model the tapped coil pair very accurately by measuring them together on a 3 port VNA as this would capture the tapped coil as a three port s-parameter model but this is probably a bit OTT.

Maybe it is worth comparing images of the tapped coil construction and layout? This might be the easiest path to success?

[ian_rodger]

Jeremy,

Thanks for your input and taking the time to prepare the simulation models. The inductors I am using are axial moulded types, soldered to the back of a rotary switch as shown on the project page. I spaced these out to minimise coupling, but now think that may have been an error. The circuit exhibits similar characteristics to your simulation with wide variation in signal output with frequency - at some points down to zero. I will experiment further with layout to see if careful placement to induce controlled coupling will improve performance.

Ian

[ian_rodger]

So I have experimented further and concluded:

1. The circuit I built on the breadboard did not include TR3/C10 as I thought that this was a sufficiently low impedance that I could use a voltage source at this point. Hence the results from this simplified circuit on coil coupling do not apply to the signal generator.

2. Any attempt to introduce coil coupling into the complete circuit either caused reduced or distorted output.

3. Adding a 4k7 series resistor between TR3 and the inductors as per the Leader circuit stops the oscillator, but adding a 1K2 resistor gives a much more consistent output across all ranges. Also increases the upper frequency limit to at least 32 Mhz.

So I will leave the 1K2 in circuit for now. Thanks to all for your assistance.

Ian

[G0HZU_JMR]

Hi Ian, it sounds like you are making progress!

I agree that your direct connection to a voltage source for the breadboard circuit will have affected the circuit operation. With a voltage source at the coil tap this would remove one of the feedback mechanisms (the classic Colpitts mechanism)

I'm not sure if it helps but see the very crude open loop gain and phase analysis of Range E when the loading of the 2n2 cap and the emitter follower are removed. In this case, the signal starts at port 1 at the top of the circuit and goes anti-clockwise around the circuit to port 2. The simulator shows that there is more than unity gain around the loop and the phase crosses through 0 degrees close to peak gain around the loop. So the oscillator should start up here. The JFET model is an AC model for a 2N5485 when biased at 1mA and 5V Vds. This is fairly close to the operating point of the real circuit.

The port impedance for port 1 and 2 is very low at 10 ohms because the main tuning cap and the (4.7uH) coil forms a highly selective L match from high impedance to a very low impedance. This isn't a great way to simulate this circuit but it can help you see one of the feedback paths. This is the classic Colpitts feedback path via the 4.7uH coils.

However, lurking within the circuit is the additional feedback path via the drain to gate capacitance of the JFET Q2. On some ranges this feedback mechanism can compete with the regular Colpitts feedback path shown below. When this happens the circuit generates negative resistance at ports 1 and 2 even in this open loop analysis. This might not be a problem but it might spoil the frequency stability on some parts of some ranges when the two feedback mechanisms compete against each other. I'm not sure what will happen in this case but you might find that in certain parts of certain ranges the oscillator won't tune smoothly when trying to adjust it across just a few kHz.

I've also added the image below to a word doc as this should give a less fuzzy image of the simulation. See the attached word doc below.

[ian_rodger]

Jeremy,

Interesting way to view the circuit operation. Can you confirm what the dashed lines on the plots represent? - the others I can follow. I think that I have gained more from studying this circuit than its likely I will from using the completed sig gen! That said, with the 1K2 resistor in circuit it does work quite well.

Thanks,

Ian

[G0HZU_JMR]

The dashed lines on the plot show the response with both the tuning caps set to 365pF. The solid lines are for 65pF. The simulator leaves these historical dashed lines every time a component value is changed. In this case I changed from 365pF to 65pF in one big step.

The other way to look at the circuit is to restore the complete loop by joining the two 4.7uH coils together at the tap point and then look for negative resistance aligning with zero reactance (resonance) at the junction of the tuning cap and the 4.7uH coil that sits on the input side of the JFET.

When this happens it means there is a resonance with energy being added at the resonant frequency (because the negative resistance acts as an energy source) so oscillation can build up at the frequency where there is zero reactance. This analysis can be done with a simulator or with a real network analyser on the real circuit although the source power of the analyser would need to be set very low to avoid overdriving the JFET.