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Old 20th Apr 2021, 10:42 pm   #21
Bazz4CQJ
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Default Re: Buffer Amplifier for Digital Frequency Counter

This thread reminds me so much of a couple of threads dating back a few years ago to attempts to build hi-impedance RF millivoltmeters (see post #8 above).

Quite a number of designs for such had been published in magazines over a period of some time; I had built a couple and Skywave built quite a few I think, and none worked anywhere near as well as they were claimed to.

When forum members skilled in the use of LT spice, and having a good understanding of the workings of J-FET's got involved, the basic problems with the designs became apparent (the phenomenon of negative resistance in FETs being one factor). Quite how so many flawed designs had been built and tested, and then published, seemed hard to understand.

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Old 21st Apr 2021, 12:18 am   #22
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Default Re: Buffer Amplifier for Digital Frequency Counter

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Originally Posted by Bazz4CQJ View Post
Quite how so many flawed designs had been built and tested, and then published, seemed hard to understand.

B
Because back when they came in to being things like LTSpice either didn't exist or weren't accessible to those not in the upper echelons of electronic engineering practice - most of these designs have been around for decades with only minor changes.
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Old 21st Apr 2021, 2:08 am   #23
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Default Re: Buffer Amplifier for Digital Frequency Counter

Yes, but does this mean that the authors all made seriously false claims about the performance of their designs? Presumably, they did test them before submitting for publication.

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Old 21st Apr 2021, 2:58 am   #24
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Default Re: Buffer Amplifier for Digital Frequency Counter

Yes, you'd hope they would have had a basic HF RF signal generator and good enough 'scope / level meter, to measure the bandwidth at least, before making any claims on this, even if they were unable to measuring the noise performance, or check it wasn't oscillating at some very high frequency - One of RF design's Murphy's laws, used to be that whenever you tried to make an amplifier, you often end up with an oscillator. And just simulating it the circuit alone, without the layout strays / coupling, won't necessarily tell you if it will always be stable. I've known even designs by professional Engineers to have oscillated at frequencies beyond the range of their spectrum analysers.

A lot may depend on the origins of the circuit, as it could have just been an example circuit from somewhere, that was never actually built (or it was designed to go into a high impedance rather than 50R etc. load - Although it does look like that simulation has also been done like that initially, so it may well be even worse into a Low impedance.)


Back in the 80's, it was also not uncommon for there to be many circuit and veroboard etc. layout errors in Electronics magazines published projects (even ones that didn't have corrections in following issues, so I once sent them a long list of ones I'd found!).
As I found out when building several, that never worked (although I did eventually learn quite a bit about fault-finding and bad designs from these!). Lack of access to much test equipment back then, also meant you didn't really know what was happening. So later-on getting given a 'scope, was a major step forward.

But there were some basic unforgivable errors, like the experienced Maplin designer of their 25W amplifier project that claimed the inputs were 100k impedance, as they used a 100k level preset. But they had followed it with a classic inverting OpAmp that only had 1k into its -ve input 'virtual-earth'. And I ended up building a proper non-inverting stage veroboard replacement!


So although free pSpice (DOS text file entry) etc. simulation software didn't become too easily available until the late 80's on PC-compatibles etc. / this didn't have much of a model library - It was a few years before release of SwitcherCAD (later LT-Spice) - most people just had to build and debug prototypes, rather than able to at least get rough expected frequency response etc.

And more specialist higher-frequency RF-simulation software is still beyond the reach of many small companies (The same with antennas, and there's probably been quite a few dodgy-claims commercially-sold ones!)

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Old 21st Apr 2021, 3:40 am   #25
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Default Re: Buffer Amplifier for Digital Frequency Counter

Yes, the test equipment needed to evaluate the pre-amp of this thread, at least to 30MHz, would not be too demanding.

I guess that many member of this forum will recall the days when many projects emerged from the pages of mags like PW, SWM and RC, with familiar authors like F.G.Rayer and others. At that time, I think we trusted that these projects were "tried and tested" and any problems, or printing errors, would soon be published as corrections.

It's clear that those days are long gone. I think I will stick to kits from established suppliers from now on .

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Old 21st Apr 2021, 4:14 am   #26
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Default Re: Buffer Amplifier for Digital Frequency Counter

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Yes, the test equipment needed to evaluate the pre-amp of this thread, at least to 30MHz, would not be too demanding.

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But it has been known for these sort of amps to oscillate up in the GHz region

One magazine (who shall remain nameless ) had a frequency counter design with an input stage that was way overboard and generally as unstable as anything, but it still got published.
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Old 21st Apr 2021, 9:16 am   #27
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Default Re: Buffer Amplifier for Digital Frequency Counter

My guess would be Miller capacitance from the first 2N2222 as the output 2N2222 has limited gain due to the -ve feedback. You can prove this by lifting the emitter decoupling capacitor, C4. This will reduce the gain to negligible but would allow you to confirm if this is the cause of the roll-off.
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Old 21st Apr 2021, 10:29 am   #28
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Default Re: Buffer Amplifier for Digital Frequency Counter

I'm not sure what the original claims are about the circuit design but at first glance one could be forgiven for thinking the following:

JFET source follower = unity gain

BJT1 provides some voltage gain followed by lots of voltage gain in the second BJT. One could be forgiven for assuming that because the BJTs are rated for VHF amplifier service then the circuit can be assumed to work well up into VHF.

However, I think reality kicks in if you work backwards through the circuit. The output BJT looks to be biased at just under 3mA and this means the collector voltage is only about 2V or so. It probably has about 4pF feedback capacitance (collector to base). It also has a 10k resistor providing negative feedback. The low frequency voltage gain is probably about 100 at Ic = 3mA and the input impedance will be dominated by the resistive feedback at low frequencies and by the Miller Effect at high frequencies. A few simple fag packet estimates put the input Rp at 100R due to the resistive feedback. The Miller Effect will put ((Av+1)*4pF) in series with about 1000/(Av+1) across this 100R so you end up with a very low input impedance to this stage. This will limit the gain of the previous BJT stage. This stage will also load the previous JFET stage quite a bit.

So the net result is a very loaded/lossy JFET buffer feeding a BJT that has limited gain that feeds another BJT that is going to have gain that drops by 20dB/decade above a few MHz.

It does look like it will droop to provide unity gain at maybe 40-50MHz but when you add coax cable and a counter to the output I think this will spoil the system gain even more at HF/VHF.

The input JFET will probably generate a lot of negative resistance up to a few MHz. I'm not sure if this would show up as a problem in typical use but I think the circuit can go unstable if probing networks that look like an inductor in this frequency range.
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