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Old 5th May 2021, 5:57 am   #21
ortek_service
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Join Date: May 2018
Location: Northampton, Northamptonshire, UK.
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Default Re: Raspberry Pi as a storage device for a PET.

Yes, that's still an issue today - where both are partially-on for a brief period, due to limited rate of change of drive signal (although for High-Power motor-drive etc. FET's, there's deadband drive-controllers). And this mainly first occurred when 'C-MOS' superseded N-MOS, and P-MOS (But the Rds(on) of the original CMOS did limit the current and prevent them blowing-up due to 'shoot-through', if inputs floated).


However, I later realised that when the input is at 3.3V, a significant current will always be flowing into base of the lower T2 transistor - So it will be fully-on, preventing the output from going above 0V.
But if the upper T1 transistor wasn't actually being turned sufficiently-off then there would be quite a significant 'shoot-through' current, this being rather wasteful and potentially damaging these.

So the addition of R4 just limited the current that T1 could pass into T2 (and also the output) to a quite low (< 0.5mA) very-safe level. With T2 then able to ensure the output is always 0V - And that's how it does actually still all work in practice!


T1 can't really provide any extra active speed-up boost, as R4 is still limiting the current it can pass (and being an emitter resistor, also provides negative feedback and so reducing drive-current into to T1 base).
So they might as well just used R4 as load-resistor on T2's collector and never bothered T1 and what seems were original attempts to have better positive output drive / symmetry of source & sink.
But, as well as using resistor dividers I'd suggested, then they could also have inserted a 3.3V etc. zener in series with T1's base, to ensure it wasn't being biased on when input voltage was at 3.3V.
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