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Originally Posted by SiriusHardware
I'm certain you're right, otherwise if the uP was halted in mid-action it would probably have to rewind to the start of the action. It would be much more logical for the uP to notice the request for the buses, finish what it is doing, release the buses and then signal that they are available.
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I was re-reading the datasheets for the sc/mpII again and noticed something interesting about the bus utilization on page 10.
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If NENIN is returned high during an input/output cycle, the input/output cycle is repeated when NENIN is again returned low.
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I then went back and checked the original sc/mp spec again and found a similar description in Note 4 of Figure 4.
This could mean that the sc/mp was the first microprocessor to support bus transaction retry, which would be a requirement for virtual memory support, but only if some other processor or hardware was handling the memory management.