Quote:
Originally Posted by Chrispy57
Hi David,
lots of more qualified comments already offered, but I wondered if the R4/C4 corner frequency of 12.8kHz may be a limiting factor. Also, whether the two diodes across the gate of the FET may have been mis-drawn too?
Cheers
Chris
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Thanks for reading the thread Chris and for you comments, and thanks also to everyone else who has responded.
Re the diodes, yes, it makes no sense to have two in parallel. As has been suggested, I've amended the circuit to revere the polarity of D1. I've also added a .01uF cap across C5, and added a .01uF cap on the output. As to R4/C4, given that my main concern is that the amplifier frequency response drops sharply after 10 MHz, do you have any thoughts as what values might improve matters please?
The amended circuit is attached.
If nothing else, it will teach me to not lift random circuits off the net and to expect them to meet my needs.
Just another example if one were needed, of what my end-of-school report prophesised way back in 1954: "He'll be good with his hands".
Oh well: "Use what talents you possess - the woods would be very silent if the only birds that sang were those that sang the best".
Henry Van Dyke.