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Not being that good with transistors it's taking me a while to get my head round things but I'm slowly creeping up on this. Some thoughts which could be completely wrong. Q2's base is always at 24v, I have a 24v zener as D2, is this right? Looking at a blown up schematic it looks like 30v Whichever this is if Q2's base is at a low voltage surely the gate of the mosfet will also be low? The gate V of the fet seems to me to be mainly dictated by a potential divider D2/Q2/D3/R7 D2 & D3 are fixed (ish) so Q2 Vce and the voltage drop across R7 are the only variable's. However Q2's collector voltage will be set by Q2's base current, but if Q2's base is always at a constant current due to the CCS, so how can Q2 Vce change?
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Nearly right
Ignore Q7 and the gate for now, normally no current flow THROUGH the gate and Q7 is turned off until significant current is flowing into the load during an 'over-current' situation so this is a valid simplification. The gate voltage is then determined by R7 and the current flowing through D2/D3/R7 and is calculated as R7 * current (and subtracted from the rail voltage).
You correctly pointed out Q2 base is FIXED at 24V. With more common transistor configurations we think of the base voltage being modulated, resulting in some current/voltage change, but that is only true when the emitter voltage is FIXED. For Q2 this is reversed, the base voltage is fixed and the emitter voltage is modulated! Contrast this with Q4 where the emitter voltage is FIXED and the base voltage is modulated.
Q2 is configured as common base and Q4 is as common emitter. When a common base is in series with a common emitter its typically called a 'cascode', a variation on the word 'cascade' which means one after the other so 'cascode' mean one on top of the other
Dave